The general structures and manufacturing processes for electronic packages are described in, for example, Donald P. Seraphim, Ronald Lasky, and Che-Yo Li, Principles of Electronic Packaging, McGraw-Hill Book Company, New York, N.Y. (1988), and Rao R. Tummala and Eugene J. Rymaszewski, Microelectronic Packaging Handbook, Van Nostrand Reinhold, New York, N.Y. (1988), both of which are hereby incorporated herein by reference.
As described by Seraphim et al., and Tummala et al., an electronic circuit contains many individual electronic circuit components, e.g., thousands or even millions of individual resistors, capacitors, inductors, diodes, and transistors. These individual circuit components are interconnected to form the circuits, and the individual circuits are further interconnected to form functional units. Power and signal distribution are done through these interconnections. The individual functional units require mechanical support and structural protection. The electrical circuits require electrical energy to function, and the removal of thermal energy to remain functional. Microelectronic packages, such as, chips, modules, circuit cards, circuit boards, and combinations thereof, are used to protect, house, cool, and interconnect circuit components and circuits.
Within a single integrated circuit, circuit component to circuit component and circuit to circuit interconnection, heat dissipation, and mechanical protection are provided by an integrated circuit chip. This chip is referred to as the "zeroth" level of packaging, while the chip enclosed within its module is referred to as the first level of packaging.
There is at least one further level of packaging. The second level of packaging is the circuit card. A circuit card performs at least four functions. First, the circuit card is employed because the total required circuit or bit count to perform a desired function exceeds the bit count of the first level package, i.e., the chip. Second, the circuit card provides for signal interconnection with other circuit elements. Third, the second level package, i.e., the circuit card, provides a site for components that are not readily integrated into the first level package, i.e., the chip or module. These components include, e.g., capacitors, precision resistors, inductors, electromechanical switches, optical couplers, and the like. Fourth, the second level package provides for thermal management, i.e., heat dissipation.
In the fabrication of packages, it is frequently necessary to use a mask, as an adhesive tape mask, to protect the underlying features during electroplating, etching, and mechanical processes. The mask has heretofore been a removable adhesive mask. The use of removable masking, as an electroplating mask, as an etching mask, and as a drilling mask.
U.S. Pat. No. 4,917,926 (Corresponding to European Patent 292304) of L. Weinhold and J. D. McDonough for Pressure sensitive adhesive masking tape for electronic components describes a pressure sensitive adhesive masking tape useful as a masking material for electronic components. The tape described therein can be used even when the component is subject to a high temperature fabrication or operation. The tape has a polymer film backing. The film and adhesive are both resistant to temperatures of up to about 250 degrees C. for up to about 5 seconds, both the adhesive and the tape require fluorocarbon solvents for post fabrication removal.
The polymer film comprises a C.sub.3-6 polyalkyl, e.g. a polybutyl, a polymethacrylate, or copolymer with a C.sub.1-2 alkyl methacrylate, ethyl cellulose or polyvinyl pyrrolidone, containing up to about 90 weight percent plasticiser.
The adhesive is polyacrylate based and is covered with a release layer, which requires a C.sub.2 Cl.sub.3 F.sub.3 CFC solvent.
European Patent 333,722 (Corresponding to Japanese Patent 90-501390) to Flifford for Adhesive laminate for masking tape comprises latex impregnated paper describes a pressure sensitive adhesive laminate of latex-impregnated Kraft paper. The laminate has a pressure sensitive adhesive layer on one face and a polymer film on the other face. The polymer film has been applied to the paper from the liquid molten state.
The laminate is described as being useful as a masking tape for printed circuit boards during soldering, e.g. air-level soldering. This is because the polymer film does not shrink or cure at the edges during soldering.
U.S. Pat. No. 4,728568 (Corresponding to Japanese Patent 62-93999) assigned to Dainippon Screen and Sanyo Pulp for Water removable masking tape filling through holes on circuit boards describes a water soluble masking tape of a water soluble paper base with a water soluble acrylic ester copolymer adhesive agent which has been softened with a polyethylene glycol derivative.
The masking tape is used in a process of filling through-holes in a printed circuit board with a filler material during fabrication. The tape is formed of a water-soluble paper as the tape base, with a water-soluble adhesive agent applied to one side of the paper. In a preferred exemplification the adhesive comprises 100 parts of a (meth)acrylic acid resin as the adhesive constituent, blended with 50-150 parts of a polyethylene glycol derivative, serving as a hydrophilic softening constituent.
As described therein, the masking tapes are used in the production of printed circuit boards having electrically conductive layers on both sides, with through holes both connecting the conductive layers to provide electrical contact therebetween, and serving as positioning holes to position the substrate in a desired position. The positioning holes and peripheral edges of the substrate are covered with the water-soluble masking tape, while the through holes are filled with a filling material which is hardened in place. Any excess or undesirably located filling material is removed form the substrate together with the tape by applying water.
U.S. Pat. No. 4,605,344 (Corresponding to European Patent 135852, German Patent DE 3333978, and Japanese Patent 60-085807) to G. Hartmann for Drilling machine for PCBs and PCB stacks describes a device including a drill spindle with drill bit, a clamping mechanism to engages the circuit panel adjacent the location of the hole being drilled and for holding the workpiece during the drilling operation. A cover tape is positioned on the surface of the circuit panel beneath the drill bit and clamping mechanism. This cover tape protects the uppermost layer of the stack.
German Patent DE 3319351 to H. H. Merkenschi and F. Nachtrub for Circuit board with gold-plated contact fingers describes a fabrication process where the circuit board is first covered with an etch-resistant photo-foil and a printing machine is used to form the contacts and conductor pattern by photolithography. A solder-stopping covering is then applied leaving the lands, pads, and solder balls free. The lands and pads are then covered with an adhesive tape and the circuit board is provided with a liquid resist and dried.
The adhesive tape is then removed, the lands and pads are electroplated with gold, and the liquid resist is removed. The lands and pads are then covered with solder stopping lacquer. The solder balls are reflowed, hot tin-plated and washed. The stopping lacquer is finally removed from the contact fingers and the circuit board passed on for further processing, e.g., mechanical processing.
U.S. Pat. No. 4,466,849 to E. Dantsker for Masking tape removal process describes a masking tape removal process using rollers mounted for rotation about an axis parallel to the surface of the PC board. Each roller is initially provided with an adhesive outer layer or band carried about its periphery. The surface of the PC board is moved past the roller, with the roller adhesive layer in registry with the tape layer to be removed, and in pressure contact with it. This is described as causing the tape outer surface to be adhered to the roller adhesive band and removed from the surface by winding on the roller periphery.
Removal of the tape is described to be expedited by providing a release agent on a localized area of the surface of the circuit panel. Alternatively, removal can be enhanced by using an adhesive tape including a localized area of only mildly adherent adhesive.
The end of the tape is said to be lifted from the surface by adhesion to the roller adhesive band.
U.S. Pat. No. 4,421,586 to R. Arthur Bargman for Pressure sensitive tape masking and stripping by wrapping over edge clip to facilitate slitting before removal describes a masking tape that is applied to and removed from opposite sides of a planar body by installing a masking preform on one edge. The preform has a pair of sides deflected to give a spring fit. The tape is applied by wrapping the tape about the edge and over the preform and its sides, then severing the preform and tape along the edge, and stripping the severed lengths by lifting off the ends overlying the preform sides and pulling the tape free from the sides.
The method is described to be particularly useful for masking printed circuit boards during contact electroplating. The preform is described as being formed of a thin polyester film that is formed into a clip. For stripping the tape off after electroplating, the leading edge of a board is introduced between a pair of opposed rollers, each such roller carrying a band of adhesive. This band of adhesive is brought into pressure contact with the tape lengths which together with the clips adhere to the bands and are wound up on the rollers, thereby removing the adhesive tape.
U.S. Pat. No. 4,670,335 (Corresponding to European Patent EP 81770, Japanese Patent Document JP 58-107494, German Patent Documents DE 3210288-A and DE 3277973-G, and Canadian Patent Document CA 1204349) to K. Grah for Masking tape for electroplating processes bearing heat-activated adhesive mixt. of plastomer, hard resin, and plasticiser describes masking tape for partial coverage of objects being electroplated, such as, conductor plates. The tape is not self-adhesive, but is heat activated. The tape has a carrier of paper or film coated with a mixt. of a plastomer, a hard resin, and a plasticiser. The paper is a soluble cellulose derivative., for example, ethylcellulose or cellulose acetobutyrate, or a vinyl polymer, such as, polyvinyl acetate. The plastomer is a maleinate, benzoate, or terpene resin, or a natural resin. The hard resin is described as being a phthalate, an adipate, or a soft resin, for example, a hydrogenated ester or a liquid urea resin. The mixture comprises 10-60 weight percent of the plastomer, 70%-30 wt.% of the resin, and remainder is plasticizer.
The papers described therein are not self-adhesive at room temperature and can be easily moved to correct positioning. They become adhesive on heating to about 100-140 degrees C., when the plastomer softens and the resin melts, to prevent influx of liquid underneath the paper.
German Patent DE 3149282-C for Masking tape for electroplating e.g. of PCB having film base with adhesive coat of plasticised hard resin also describes a masking tape used in electroplating printed circuit boards. The tape consists of a film base with a plasticized, maleic acid or carbamide hard resin adhesive coat on one side.
The above described processes, while protecting the surface morphology of circuit cards and boards, that is, panels, during drilling of vias and through holes, introduce organic adhesives and/or organic solvents into the processing environment. Many of these organic adhesives and organic solvents are incompatible with existing panel fabrication coatings, layers, materials, and processes.
Two documents describe protective plated surfaces.
U.S. Pat. No. 4,704,791 (Corresponding to European Patent EP 235701-A, Japanese Patent Document JP 62-206897-A, Australian Patent AT 87-69674-A, and Canadian Patent CA 1245774-A) to L. Chellis and T. Ellis for Forming land-less through-hole connection describes a process for forming a landless connection by forming and plating the through holes in presence of a temporary conductor pattern support inside of the dielectric. In the described process landless through hole connections are drilled through a support layer of a thick metal and a release layer of a thinner metal. More particularly, the conductors are connected through a dielectric by providing the dielectric layer with a conductive pattern on one surface covered by a temporary support layer; forming a second conductive pattern on the opposite surface, also with a temporary support layer covering it; forming the through-holes between the conductive patterns on the opposite faces of the substrate; plating the through holes to form the connections between the connections; and peeling away the temporary support layers to landless connections between the patterns. Thus, the metal support layer is used as a cathode, to be stripped away, leaving behind a landless through hole.
U.S. Pat. No. 4,574,031 to J. K. Dorey, J. T. Huneke, B. S. Madsen, and T. F. Schaaf for ADDITIVE PROCESS ELECTROLESS METAL PLATING USING AQUEOUS PHOTORESIST describes a method for producing drilled holes in circuit panels and then cleaning and sensitizing the surface. The sensitization layer is plated in the holes as well as on the surface. The process includes applying a photoresist to the substrate to delineate the desired pattern; etching the exposed substrate surface; washing in reducing media to reduce and remove chrome from the substrate surface; catalysing the substrate surface; and electrolessly depositing a thin flash metal coating; then stripping the photoresist mask and any overlying catalyst and flash plate to leave a flash plate pattern on the substrate.
These two plating processes are not related to masking during mechanical working.